OpenFPGA maintains a list of useful web resources and links.
In addition, OpenFPGA members may utilize the OpenFPGA Test and Validation lab free of charge to aid their development of reconfigurable applications.
FPGA Related Product Information and Announcements
OpenFPGA is in the process of constructing links to online resources already available in the area of reconfigurable and FPGA computing. This version of the resource is the first release of resource suggestions recently contributed by OpenFPGA mailing list participants. If there are resources which you have found useful that you would like to see included in the list, please join the OpenFPGA mailing list and let the community know.
The following provides a series of links to ongoing FPGA related efforts, commercial, academic, and non-profit.
George Washington University
Reconfigurable Computing Glossary
- Click here for Terms and Definitions
Reconfigurable Computing Web Resources and Sites
Are FPGAs a Disruptive Technology for HPC? (HPCWire, February 2006)
Re-configurable Computing with FPGAs - Is it Promised Jerusalem? (PRIMEUR, 23 February 2005
AMD Torrenza Site
The OpenCores website
Xilinx resource page with useful information at www.xilinx.com/esl.
(There are ESL (software-to-hardware) companies and other resources listed here)
The Wikipedia entry for FPGA also has some useful stuff:
Web Blog by Amir Hirsch – a personal perspective on FPGA and computing
A Compiler Intermediate Representation for Reconfigurable Fabrics
Trident Compiler for Floating Point Applications
Sea Cucumber: A Synthesizing Compiler for FPGAs
Computational Bottlenecks and Hardware Decisions for FPGAs
Using FPGAs in Astronomical Research – improved adaptive optics simulations (Badsen) PDF [link to badsen.pdf included]
Using FPGA-Based hybrid computers for bioinformatics applications
Scalable cluster-based FPGA HPC system solutions
A novel processor architecture for FPGA supercomputing
Accelerating Algorithms - Opening more applications
Hardware Acceleration using C to Hardware tools
Ashenden's VHDL cookbook
FPGA performance comparison
The FPGA journal for news in the field
Research Group and Activities
Case Studies in FPGA Acceleration of Computational Biology and Their Implication for Development Tools
The Hamburg VHDL archive
Leeser research group's web page is available at: http://www.ece.neu.edu/groups/rcl/index.html
Leeser variable precision floating point library
Leeser VSIPL++ project where we separate the hardware specification from the algorithm specification when mapping to FPGA hardware
Publications from Leeser research group
Configurable Computing Lab at BYU
Making FPGAs More Accessible
[OpenSource] Reconfigurable logic can accelerate applications, but only if it is usable by the developers who are developing the applications. Creating designs for reconfigurable logic in hardware description language (HDL) can be difficult and time-consuming. Most application developers have little to no hardware design experience. However, high-level language compilers like Trident, developed by researchers at Los Alamos National Laboratory, N.M., ease this burden and allow more people to easily program field-programmable gate arrays (FPGAs).
Trident is a open source (GPL) C compiler for reconfigurable supercomputers that accepts C language input containing floating-point calculations and translates this language into FPGA hardware. While C-to-FPGA commericial compilers are available, the Trident project aims at providing an open compiler infrastructure that a community of developers and researchers can freely use and contribute to. Through this way the community can benefit through different kinds of optimizations and the targeting different floating-point libraries. Also, the Trident framework can be used to teach and explore how reconfigurable logic compilers are put together.
For more information, see http://trident.sf.net.
[Non-commercial] Lower Level Virtual machine
[Non-commercial] Algorithmic Hardware Compilers
[Commercial] Impulse C provides compilation and optimization of a growing subset of C, targeting both embedded applications (with or without embedded processors) and high performance computing platforms. The Impulse compiler is capable of generating parallel structures through C statement scheduling, loop pipelining and other methods. Impulse C also includes an ANSI-C compatible API allowing multi-process parallelism to be expressed through data streaming and other methods.
Information can be found at www.ImpulseC.com.
[Commercial] SRC Computing Inc.
[Commercial] HCE (HARWEST Compiling Environment) from Ylichron
[Commercial] Extreme Data
[Commercial] Viva from Starbridge Systems Inc.
[Commercial] Pico Computing
[Commercial] Codetronix and Mobius ESL tool
[Commercial] Catapult-C from Mentor Graphics: